The Basic Of Logic Design (Part 1)

LOGIC DESIGN

1. Digital electronics operate with only two voltage levels:

    a high voltage and a low voltage.

2. Computer used binary system (1,0).

3. Combinational logic block contain no memory.

4. Logic block with n inputs, there are 2^n entries (possibility)

     in the truth table.

TRUTH TABLE

Consider a logic function with three inputs, A, B, and C, and three outputs,
D, E, and F. The function is defined as follows: D is true if at least one input is
true, E is true if exactly two inputs are true, and F is true only if all three inputs
are true. Show the truth table for this function.

The truth table will contain 2^3= 8 entries. Here it is:

Inputs			Outputs
A	B	C	D	E	F
0	0	0	0	0	0
0	0	1	1	0	0
0	1	0	1	0	0
0	1	1	1	1	0
1	0	0	1	0	0
1	0	1	1	1	0
1	1	0	1	1	0
1	1	1	1	0	1

Truth tables can completely describe any combinational logic function; however,
they grow in size quickly and may not be easy to understand. Sometimes we want
to construct a logic function that will be 0 for many input combinations, and we
use a shorthand of specifying only the truth table entries for the non-zero outputs. 

BOOLEAN ALGEBRA

Another approach is to express the logic function with logic equations. 

1. The OR operator is written as +, as in A + B
o   0 + 1 = 1 ------- 1 + 0 = 1

2. The AND operator is written as & , as in A & B

  o   0 · 1 = 0 ------- 1 · 0 = 0

3. The NOT (inversion) operator is written as - or ' , as in A'

  o   0’ = 1 ------- 1’ = 0

BOOLEAN ALGEBRA LAWS

CLASSIFICATION	LAWS
Identity	A + 0 = A A & 1 = A
Zero and One	A + = 1 A & 0 = 0
Inverse	A + A’ = 1 A & A’ = 1
Commutative	A + B = B + A A & B = B & A
Associative	A + (B + C) = (A + B) + C A & (B & C) = (A & B) & C
Distributive	A & (B + C) = (A & B) + (A & C) A + (B & C) = (A + B) & (A + C)
Demorgan’s	(A + B)’ = A’B’ (AB)’ = A’ + B’

GATES

1. Logic blocks are built from gates that implement basic logic functions.

2. Any logical function can be constructed using AND gates, OR gates, and inversion.

3. Two common inverting gates are called NOR and NAND.

DECODER

1. Use decoder to build larger components

2. The most common type of decoder has an n-bit input and 2^n outputs, where only one output is asserted for each input combination.

3. This decoder translates the n-bit input into a signal that corresponds to the binary value   of the n-bit input.

4. The outputs are shows a 3-bit decoder and the truth table. This decoder is called a 3-to-8 decoder.

5. Since there are 3 inputs and 8 (2^3) outputs. There is also a logic element called an

6. Encoder that performs the inverse function of a decoder, taking n inputs and producing

7. an n-bit output.

  

                                 A 3-bit decoder and the truth table for a 3-bit decoder

A 3-bit decoder has 3 inputs, called 12, 11, and 10, and 2^3 = 8 outputs, called Out0 to Out7. Only the output cor responding to the binary value of the input is true, as shown in the truth table. The label 3 on the input to the decoder says that the input signal is 3 bits wide. 

MULTIPLEXOR (SELECTOR)

The output is one of the inputs that is selected by a control

The left side shows this multiplexor has three inputs:
two data values and a selector  (or control) value. The selector value determines which of the inputs becomes the output. We can represent the logic function computed by a two-input multiplexor, shown in gate form on the right side as C = (A & S') + (B & S)

• Multiplexors can be created with an arbitrary number of data inputs. 
• When there are only two inputs, the selector is a single signal that selects one of the inputs
• if it is true (1) and the other if it is false (0). If there are n data inputs, there will need to be [log2 n] selector inputs. 
• In this case, the multiplexor basically consists of three parts:

1. A decoder that generates n signals, each indicating a different input value
2. An array of n AND gates, each combining one of the inputs with a signal
from the decoder
3. A single large OR gate that incorporates the outputs of the AND gates

• To associate the inputs with selector values, we often label the data inputs numerically (i.e., 0, 1, 2, 3, . . . , n − 1) and interpret the data selector inputs as a binarynumber. 
• Sometimes, we make use of a multiplexor with undecoded selector signals.
• Multiplexors are easily represented combinationally in Verilog by using if expressions.
• For larger multiplexors, case statements are more convenient, but care must be taken to synthesize combinational logic.

Sources : http://www.cs.colostate.edu/
                http://cs.baylor.edu/
                Lecture note chapter 3

Post by : Ain Nasuha Bt Abdul Yazid